The Development Of PowerPC-Based SoC Verification Platform

With the development of VLSI, IC design paces in the SoC period. While the SoC scale continuously expands, the verification of SoC becomes more and more difficult. Verification has become the bottleneck of SoC design. As the design complexity increases and the time-to-market shrinks, it becomes increasingly important to have a development environment that supports hardware/software co-verification. Hardware/Software co-verification technology is to verify the hardware and software concurrently prior to silicon, with the purpose of early verification of the hardware/software correctness.A PowerPC-based HW/SW co-verification platform is designed in this thesis. The platform is an environment which integrates the C compiler, linker, assembler, hardware description language compiler and simulation tools. In order to improve the verification efficiency, the platform provides the basic development framework and toolset to support verification process automation.From the perspective of engineering practice, this paper introduces the developing method of verification platform based on SoC platform framework, SoC hardware architecture and software development environment. The platform is designed using the layered approach. It can be divided into hardware layer, hardware/software interface and software layer. The verification process is managed and scheduled by the verification process management program, associating with efficiency methods of data organization. Besides the system design, the work can be divided into two parts: SoC hardware design and software development environment design. The PowerPC 405 IP core, which is the basis of the hardware system, is introduced in the thesis. Then the architecture of the SoC system based on CoreConnect bus is introduced. The design of software development environment contains a lot of tasks, such as developing basic test routines, building cross toolchains, writing link script, designing file format converter and writing C testcases by inline assembly.The platform is used to design the hardware and software concurrently. Software engineers can develop the bootstrap, device driver, RTOS BSP and applications based on the hardware models. At the same time, hardware engineers can use the test patterns generated from the real applications to debug codes.It is helpful to find hardware bugs and cut the design risk.