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Research On Reusability And Automation Of Verification Platform Based On UVM

Posted on:2021-12-27Degree:MasterType:Thesis
Country:ChinaCandidate:C HuangFull Text:PDF
GTID:2518306551452844Subject:Master of Engineering
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With the development of Integrated Circuit(IC)technology and design capability,its design scale and complexity are also increasing,which leads to the increasing difficulty of IC verification and IC verification takes up more and more time.Universal verification methodology(UVM)has become the mainstream verification method because of its strong reusability and ease of use.However,the increase of IC scale brings some difficulties to the UVM-based IC verification,such as the huge amount of code to build the verification environment,the increasing number of test sequence,time for regression tests is increasing and so on.Therefore,it is very important to improve the efficiency of IC verification.In order to improve the efficiency of the verification,this thesis studies the reusability and automation of the verification platform based on UVM.The main works include:(1)Universal Verification Component(UVC)is designed for the implementation of a reusable verification platform and common method is given based on simplifying test cases.The design of UVC is based on the standard bus protocol.The horizontal reuse and vertical reuse of the verification platform can be realized through UVC.The design of the general method includes clock reset operation and register operation.(2)Automatic generation of verification environment and register model.Based on Mako templates and Pyhton scripts,the automatic generation of the verification environment is generated and an automatic verification environment generation system is designed.The automatic generation of the register model is based on Perl scripts.Using these two methods can quickly complete the establishment of verification environment and the integration of register model in verification environment(3)Automation of regression testing.Based on the shell scripts,the process of regression testing is controlled,testing can run automatically,and testing results can be collected automatically.The above researches are applied in the verification of AHB-APB peripheral system.The verification results show that,the reusable and automated verification platform studied in this thesis can quickly establish a verification environment and the efficiency of verification has been greatly improved,compared with the traditional method of manually setting up a verification environment.
Keywords/Search Tags:IC verification, UVM verification environment, reusable, automation, verification efficiency
PDF Full Text Request
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