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Automated Testing And Optimization Of SOC Hardware Acceleration Verification Platform

Posted on:2020-09-28Degree:MasterType:Thesis
Country:ChinaCandidate:H R LuFull Text:PDF
GTID:2428330602950215Subject:Engineering
Abstract/Summary:PDF Full Text Request
At present,the verification of System On Chip(SOC)accounts for 70% of the total chip development workload,and is one of the main technologies for SOC design and implementation.In addition,as the circuit scale progresses to Very Large Scale Integration(VLSI),the hardware model is bound to become more complex and the amount of computation is greatly increased.Therefore,simply using software simulation for functional verification can no longer meet the needs of SOC verification.SOC design requires a more effective verification method,and hardware accelerated verification technology should be shipped.Hardware accelerated verification technology is a method and means to verify the design with a hardware simulator.It maps the design to be verified to a processor array or Field Programmable Gate Array(FPGA),and then the system is validated.For the LTE system,we will fully verify both the algorithm level and the system level.The algorithm-level verification is mainly the simulation of the LTE physical layer,and the system-level verification is to detect whether the function of the LTE module in the baseband chip is correct,and it will include simulation of timing,power supply,and etc.Based on past project experience,these verification tasks are done by using software simulation methods,but the efficiency is very low.The hardware acceleration verification method can use a higher clock frequency,which is roughly 2MHz,and the software simulation maintains an average of 1KHz.The speed of the hardware acceleration is qualitatively improved compared to software simulation.As the verification work deepens,it progresses to the middle and late stages of the verification phase,the number of verification cases is increasing,and the complexity of the verification cases is increasing,the design is also iteratively iterative,so regression testing is necessary.Automating regression testing helps ensure project quality and reduces the burden of tedious tasks.Aiming at the obstacles faced by the group in the LTE module verification work,on the basis of fully analyzing the hardware accelerated verification platform,the innovative combination of automation design,the software programming language is used to write the script to realize the hardware accelerated verification platform test without changing the structure of the test case,and the efficiency of the test process is optimized.In this paper,different algorithm-level and system-level test cases are used,and the applicable automation processes are developed by using programming languages(Python,Perl,Shell,Matlab,etc.),and finally a simple,efficient and reusable method and process of the hardware acceleration test is realized.And practice shows that the speed is increased by nearly 20 times compared with software simulation,and it takes only a few minutes to automatically generate 10,324 lines of verification file code,which reduces manpower input,improves work efficiency and avoids the error resulted by human factors,increases the stability of the process.
Keywords/Search Tags:LTE, hardware accelerated verification, algorithm, system, automation test
PDF Full Text Request
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