Float Point Unit Design And Verification Based On PowerPC

Since the first microprocessor was made, the floating-point processing of microprocessor has more and more widely applied in the field of aerospace,multi-media, signal processing and many others.It become increasingly closer in human daily life and work. With the increasing development of science and technology, people have higher and higher request of the floating-point processing, it present a greater challenge to the design and verification of floating-point unit. Therefore, the emphases of this paper is the floating-point design and verification based on Power PC.Detailed analysis the development background and application scope of Power PC, the functional requirement and the composition mechanism of floating-point unit. Focus on the analysis of the strict definition of IEEE754 standards of computer floating-point format which is widely used, and deeply studies the algorithm of floating-point numbers,these work lays a theoretical foundation for the design and research. Based on the IEEE754 standard and the floating-point arithmetic, give the overall logical structure of floating-point unit. Complete the main module and function principle analysis, detailed design and key code to realization, include pipelines, memory addressing, floating-point instructions, floating-point exception and disposal. Depend on the software and hardware co-verification method, completed the design of the floating-point unit to verify the work though the module level verification which draw support from the Synopsys DVE E-2011.03 and virtual platform level verification which operates through the NC_verilog.All passed verification items means that the design of floating-point unit meet the design requirement.The work of this paper is a beneficial exploration on the floating-point unit design, with reference to related design.