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Design And Implementation Of 12-bit ADC Used In Infrared Detector Read-Out Circuit

Posted on:2008-01-26Degree:MasterType:Thesis
Country:ChinaCandidate:W ZhengFull Text:PDF
GTID:2178360245992972Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
The developments of image processing, telecommunications and audio/video processing are driving the ADCs towards higher speed, higher resolution and lower dissipation. In high-resolution conversion, pipelined ADC has a better tradeoff between speed and dissipation than other architectures. According to the background of infrared detector, this paper designed a 12-bit 25Msample/s pipeplined ADC used in infrared detector read-out circuit and optimized the ADC's power dissipation.Based on the principle and error mechanisms, this thesis chooses circuit parameters percisely to prevent over-design and unnecessary dissipation. A special Sample and Hold circuit is employed which enables ADC to sample a single-ended signal. A (2.5+1.5×8+2) pipelined structure is used after analyzing effects of resolution per stage on system power comsuption and noise characteristic. Then how the nonideal factors influence ADC's performance is discussed, and deduced in mathematical way. Due to the inter-stage gain, the nonideal factors'influences are weakened dramatically down the pipelined stages, which validates sample capacitors reduction along the pipeline. The sample capacitors of every stage are calculated accurately, and prove power efficiency by simulation.This paper pays much attention to circuit parameters selections after the system design is accomplished. The parameters of Operational Transconductance Amplifier, such as open loop gain, bandwidth and slew rate are calculated to satisfy the accuracy requirement of each stage. Since error correction technique relaxs the comparators'offset requirements, this design employs dynamic comparators which have large offset voltage but ultra low power dissipation. The total dissipation of ADC is calculated by TRAN simulation: about 124mW at 3.3V single power supply, suitable for infrared detector application.The porposed 12-bit pipelined ADC is implemented with Chartered 0.35um N-well P-sub 2P4M standard CMOS technology, and the layout of key modules is accomplished.
Keywords/Search Tags:High speed pipelined ADC, Low power dissipation, Operational Transconductance Amplifier, Dynamic comparator, Error correction
PDF Full Text Request
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