The Design Of Waln MAC Controller's Main Model Based On WB Bus

With the development of wireless local area network(WLAN), many kinds of interrelated standards are emerging. As one member of IEEE 802.11 protocols, 802.11a is operated on ISM and U-NII 5GHz frequency band with high speed of 54Mbps in data transfer. It has became one of the most popular standards in the industry.Mobile terminal can not access the network without a WLAN card. So, the research of WLAN card has became the research hot in wireless communication field now. MAC controller was one of the key components of WLAN card. So, the study of the WLAN MAC controller is very important. The main goal of this paper is to design the MAC controller of the WLAN card. After the detailed study of the protocol of 802.11a MAC and the compare of the design scheme of Intersil's MAC controller in this paper, a scheme of designing MAC controller based on WB bus was advanced. The advantage of SOC design is the reusable of IP. It can improve the efficiency of system development greatly.The data was needed to be transferred between baseband processor and mobile terminal by TRI unit of MAC controller. How to match different data transferring speed in different system and to avoid covering existing data, losing transferring data and reading invalid data is the problem that the designer of WLAN card must solve. Fortunately, the asynchronous FIFO memory can be employed to deal with the data transferring problem well. The function, design principle and difficult were discussed in detail in this paper. Based on all of this, the idea of designing asynchronous FIFO based on gray code was advanced. And then, the whole RTL design, function simulation and synthesis was done.Besides, the design and simulation of two main peripheral equipment of on-chip bus: WB arbiter and DMA controller was done. Bus arbiter was used to arbitrate the embedded bus. A round-robin arbiter was completed in this paper, it can ensure every unit has the equal opportunity to access the on-chip bus. DMA controller was used to transfer network data frame directly between the TRI and exterior SRAM without the interposition of embedded MCU. It can reduce the burden of MCU. And then the integration of MAC controller using wishbone bus was implemented. At last, the validation of MAC controller on Xilinx Virtex-II FPGA development board was done .