Design Of LCVCO In Application Of Fractional-N Frequency Synthesizer

A design of LCVCO in application of fractional-N frequency synthesizer has been proposed in this thesis.The main objective of LCVCO design is low phase noise, wide tuning range and low power consumption. Phase noise is the key parameter which has important effect on LCVCO performance. In present, phase noise theory has been developed well and the linear time varying model presented by Hajimiri has deep significance in LCVCO design. One of the most important content in this thesis is research on the core of linear time varying model– impulse sensitivity function.LCVCO in fractional N frequency synthesizer has been designed using full costom, from top to bottom design method. By analyzing theory and comparing different topology of LCVCO circuits, based on the UMC 0.13μm CMOS RF PDK, a cross coupled complementary full differential LCVCO with on chip integrated inductor has been designed. Cadence SpectreRF simulator has been used to proceed circuit simulation and inductor optimization, and the layout and verification has been done. The result of simulation shows that: in the temperature range of -25℃~80℃, output frequency range of LCVCO is 1800MHz~1930MHz; phase noise can be low as -132dBc/Hz@1MHz when the output frequency is 1800MHz. The power consumption of LCVCO is 21mW because of using tail LC tuning tank design technology.