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The Design Of △∑ Fractional_N Frequency Synthesizer In DVB-H Digital Television Tuner

Posted on:2009-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y J ChenFull Text:PDF
GTID:2178360245466120Subject:Circuits and Systems
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Frequency synthesizer is widely used in communications projects, consumer electronics products, and other fields. It has been developed from discrete components and integer type to IC and fractional_N type as the development of communications technology and IC process, as well as the higher requirements on the aspects as power consumption,size,fully integrated, performance. Based on a A∑fractional_N frequency synthesizer which applied in DVB-H mobile digital TV, this thesis makes a detailed reseach and discussion on the optimization design of PLL loop and noise on the level of system and circuit, respectively.First of all, at the system level, derived frequency synthesizer system specification according to the DVB-H standard, and analysed synthesizer architecture and the design basis of the options of fractional_N frequency synthesizer.Secondly, a new calculating approach of passive loop filter of fourth order CP-PLL frequency synthesizer is clearly introduced to simplify design process greatly based on relation of loop parameters, such as phase margin,bandwidth, pole point,zero point and so on. A behavioral modeling for this△∑fractional_N synthesizer is established. To meet the needs of the target, a detailed analysis on AI modulator and the noise characteristics in loop dedicates that noise optimization must has a tradeoff between the suppression of△∑quantization noise and band noise.Then, at the circuit level, LC-VCO is chosen based on the design and comparison of the ring VCO and the LC VCO circuit. Also pointed out that the power consumption in the absence of constraints, the ring can be achieved good VCO phase noise indicators. At the same time, phase frequency detector, charge pump and△∑modulator is also analysed.Finally, the synthesizer is tapeouted with TSMC 0.18um CMOS process. Test results show that the phase noise of measurement and calculation and simulation in good agreement. Using integer frequency can meet the DVB-H phase noise specifications, fractional_N frequency can reach the DVB-H phase noise specifications in low frequency and need improvement in high frequnecy, and the actual loop bandwidth smaller than the design. These results are helpful for future research work.
Keywords/Search Tags:Phase_locked loops, Fractional_N frequency synthesizer, Phase noise, △∑modulator
PDF Full Text Request
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