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The Study And Implementation Of Timing Modeling Techniques For Full-Custom Macro Blocks

Posted on:2011-12-11Degree:MasterType:Thesis
Country:ChinaCandidate:Y F JiaFull Text:PDF
GTID:2178330338490095Subject:Electronic Science and Technology
Abstract/Summary:PDF Full Text Request
YHFT-DX is a high-performance DSP, which is in the process of development with the goal of 600 MHz for its core design. In order to achieve the high performance, the design method mixed the semi-custom with the full-custom is employed. The full-custom design is used for key components such as arithmetic unit, register files, internal cache and etc, while the semi-custom design is used for the rest components. With the purpose of blending the full-custom modules into the semi-custom design successfully, it is necessary to establish the timing model.At present, many EDA factories have designed the timing model tools for the standard cell, which are able to accomplish the characteristic parameter extraction for standard cell and I/O cell automatically. However, there are few automatic tools supporting for the timing model of the complicated full-custom models, which extract the characteristic parameter of model mainly by manual operating.Based on the researches at home and abroad, this thesis makes a depth research on the issues of the timing modeling for the full-custom module on the condition of the deep sub-micron, and proposes the full-custom module timing modeling method for DX processor. On the basis of the research mentioned above, an automatic modeling tool and some algorithms have been designed in practice, which improve the efficiency and accuracy for timing modeling greatly. The innovation provided in this thesis embodys in the following aspects: 1. In order to guarantee the extracted characteristic parametric table characterizing the parametric surface as close as possible, the parametric table's optimization is achieved by the algorithm which first extracts the parameter by the method of dynamic increase sample point and then makes twice one-dimensional compaction for the parametric table. 2. In order to improve the simulation accuracy in the circuit, a kind of test circuit structure with VCVS is employed, by which the accurate nonlinearity input signal is received and the quick and precise control for the signal slope is achieved. 3. Because the quality of the stimulus wave which directly influences the quality of the extraction for the characteristic parameter is one of the key preconditions for the parameter extraction, a generation algorithm of simulation wave based on path sensitization is proposed and through this algorithm, the concise and needed stimulus wave is provided.
Keywords/Search Tags:Full-custom, Timing Model, Static Timing Analysis, Characteristic Parameter, Stimulus Wave
PDF Full Text Request
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