The FPGA Design Based On The Nios Ⅱ About Fingerprint Recognition Algorithm

Nowadays, the use of biometric identification technology has been developed rapidly and continuously enter into the fields, For example, physical security (doors, the building) and logical security (PC, Network) fields have been widely applied. Biometric technology is the use of physiological or behavioral characteristics to check (verify) or confirmed (identify) the identity. Fingerprint Identification in any of the other means of identification have advantages: a fingerprint is unique and stability characteristics; With fingerprint sensors provide improved performance and lower prices. Fingerprint collection is relatively easy; The fingerprint recognition algorithm has been more mature. Fingerprint recognition technology has been gradually finding their way into the civilian market, and many applied to the embedded device. In the fingerprint recognition algorithm, as the large amount of computation of the fingerprint image data processing and cycle number, so compared to the fingerprint image processing time and more time, it is not easy to meet the needs of the market. In order to solve this problem, this paper presents a fingerprint recognition algorithm based on the Nios II FPGA design.FPGA using fingerprint recognition algorithm has three options are available: one is the DSP+FPGA program. In this programs, the traditional DSP processor can be used as the main processor, and the FPGA processor as the slave processor; FPGA-based Nios II is a program, the use of such programs, Nios II C2H hardware can be used to speed up the compiler optimization and the custom instruction can be used to optimize directly the fingerprint algorithm; There is an entire FPGA-based hardware. This program is to use the whole fingerprint recognition algorithm to achieve all by the hardware. In comparing the advantages and disadvantages of the three options, we have decided to implement the second option, FPGA based on the Nios II program.Altera's Nios II processor is a configurable soft core processor which can be used by a programmable logic device. The Nios II processor can obtain high performance and low cost, which portfolios with the short development cycle and low-cost Cyclone II FPGA of Altera. Therefore, we do experiment about fingerprint algorithm with the Cyclone II FPGA development board which is based on the Nios II.Nios II system fully embodies the SOPC thinking. At this stage, the advantage is of its flexibility, Adaptability, the application of real-time, extensive. Compared with the hard-core systems, Nios II soft-core has a certain gap in performance. Meanwhile, along with Nios CPU frequency increased, the stability of the whole system will be affected. If you want to use Nios CPU as Operational components, we must take full advantage of a user custom instruction characteristics. According to the application, we should rational use advantages of FPGA hardware implementation. As filtering and matching of feature point module contains a lot of arithmetic operations calculation such as multiplication and division, in fingerprint recognition algorithm, it will occupy a lot of time if the software to deal with these arithmetic operations. So these complex module has been handled by the hardware flow method in this experiment. C2H is the custom-builted hardware accelerator for Nios II. C subroutines of higher performance requirements can be accelerated by Nios II C2H compiler, and will be converted into FPGA as more faster hardware accelerators. After this accelerator has been integrated into the Nios II system, it will link the process of building with Nios II software. Nios II C2H compiler will use the least occupied resources to help Nios II users to improve system performance. Nios II C2H which is applied to a variety of software applications, including autocorrelation, allocation, coding, color space conversion and fast Fourier transform (FFT), is a plug of the Nios II integrated development environment (IDE), this will make the Nios II software developers work in a familiar interface.In the fingerprint recognition algorithm, the amount of computation of the fingerprint image data and cycle number is very large; And in the handling of fingerprint images, frequently used coordinate conversion, which is involved that make the image coordinates of the rectangular coordinate convert to the polar angle coordinate. Coordinate use custom instruction to complete the conversion. Using a set of displacement and add operation, which are easy completed by hardware, to take the place of multiply-add operation can be greatly shortened the transform time. Custom instruction is a way to accelerate software algorithm. The use of the Nios II custom instruction can make a standard instruction sequence simplify to a single instruction which can be implemented by hardware. So by this way, we can simplify system software design and speed up the operating speed of running the system. Nios II custom instructions is an user logic block which is connected with the ALU from the CPU data path. Nios II processor is a special directive which supports 256 with fixed or variable clock-cycle operation. Designers can use these directives to accelerate the practice-strict code. The link of custom instruction logical block and Nios II is completed in the SOPC Builder. When system generates, the Nios II IDE is creating a macro for each user instructions, which is defined in the header files of system. User can directly call this macro in C or C + + code.Through the use of custom instruction and C2H compiler to speed up the running time of fingerprint recognition algorithm, we obtained more satisfactory results. These results also firm our confidence that continue to use the Nios II embedded processor to design more accelerated design. At the same time of the study and research for this paper, I laid a solid foundation for FPGA,SOPC and Nios II.