Research On All Digital Phase-Locked Loop With High Precision Automatic Modulus Control

With the flying development of large scale and super high speed integrated circuit, the integration of digital system becomes higher and higher, and the logic speed becomes faster and faster, which makes the application of all digital phase-locked loop in every domain of digital communication, control project and wireless electronics more and more extensive. The developmental trend of intending integrate circuit technology is that the whole system is integrated in a chip, the chip goes by the name of system on a chip (SOC). Therefore, researching on the all digital phase-locked loop which can be embedded in systemic chip and improving the work capability of the loop have quite important meaning.The structure of the all digital phase-locked loop is multiform. One of the primary capability index is that pull-in time is short, synchronization error is small, anti-interference ability is strong. However, it is incompatible between shorten pull-in time and reduce synchronization error. After analyzing the main reason of the contradiction, a fast all digital phase-locked loop with automatic modulus control is presented. It switches fast pull-in area, slow pull-in area and locking area by using the out signal of phase detector and controls the loop bandwidth by controlling the modulus of digital loop filter automatically. The system can overcome efficiently contradiction between pull-in time and anti-interference property. Its merits are that synchronization setting-up time is short, anti-interference ability is strong, static phase error is small and integration is easy.The rationale and implementation method of the ADPLL is introduced, and the Verilog HDL language is adopted in the systemic design. Its performances are analyzed and verified by simulation. In this design ModelSim SE PLUS 6.0 is used as the simulation software, and synthesis software is Quartus II 4.0, by which the design entry, function simulation, timing simulation and device programming can be done. The top-down design method is used as the main design way of this problem. In the design process, verification was applied in every stage. This method can heavily increase the reliability of the design.