Research On Tracing Technology Of Phase And Frequency Based On FPGA

Phase and frequency tracing technology, that is phase-locked loop is brought out by De Bellescize since 1932.Up to day, it have developed and been applied widely. Compared to analog phase-locked loop, all-digital phase-locked loop is more stable, easy to integrate, works reliably and so on. Hence, it is largely applied in the field of communication and automation. With the rapid development of large-scale and ultra- high speed circuits and the appearance of FPGA, the more and more high digital-system integration and the more and more rapid speed of calculation make all-digital phase-locked loops being applied comprehensively.On the aspect of theoretical analysis, the theory of analogous phase-locked loop and of each module of digital phase-locked loop is being studied. On this basis, the basic circuit composing XOR logic digital phase detector, K counter circuit filter and ID counter digital oscillator, and designed automation modulus control circuit constitute the whole digital phase-locked loop circuit. In the digital phase-locked loops, circuit capture time and the performance of anti-noise are contradictory. For easing this contradiction, some scholars study and explore with depth, and then provide a rapid all-digital phase-locked loop with automation modulus control circuit. This system makes use of the output of phase detector to determine and switch the rapid capture, slow capture and focus field. And by automatically control the modulus digital circuit filter is to realize real-time control of bandwidth and at the same time to avoid digital phase-locked loop appears continuous same direction adjustment in order to decrease oscillation because of overshoot phase during capturing.The whole design adopts VHDL langue to complete this whole all-digital phase-locked loop system. Through Quartus II software simulation and actual measurement based on FPGA, the correctness of automation modulus control method and the high performance of this phase-locked loop is proved.This experiment adopts low-profit FPGA Cyclone serials EP2C8QC208 made by Altera as the hardware platform. The main clock frequency of this circuit is 20MHz. In this designed logic circuit, because the clock frequency of all the modules is different, using phase-locked loop inside the chip increases various frequency clock signals.