The Research And Implementation Of Digital Up Converter And Digital Down Converter By FPGA

Today, intermediate frequency (IF) signal digitalization becomes the prevalent choice in Software Radio (SWR), thus, Digital Up Conversion (DUC) and Digital Down Conversion (DDC) are ones of the key techniques of SWR. This paper deals with the design and implementation of DUC and DDC by field-programmable gate array (FPGA). Firstly, the related theory and algorithm of DUC and DDC are introduced. Secondly, using Top-Down design method, DUC and DDC are divided to many function modules and organized to the module library. In practice, these function modules are selected, configured and optimized to satisfy the system demand. Based on look-up table (LUT) and Coordinate Rotation Digital Computer (CORDIC) algorithm, a method for implementing a numerically controlled oscillator (NCO) is described in the paper; The decimating digital filter of DDC is designed as the cascade of cascaded integrator-comb (CIC) filters and Half-Band filters (HBF). To compensate the CIC's passband attenuation, second-order polynomials (ISOP) filter is used. The channel shape filter is implemented by Distributed Arithmatic (DA). In DUC, interpolating digital filter consists of a sharpened CIC (SCIC) filter. At last, every function module designed in this paper is simulated by FPGA. The results show the design is correct.