The Design And Implementation Of Bilinear Interpolation Algorithm Based On FPGA Image Display

A single CCD or CMOS sensor is usually used to reduce cost and complexity in the manufacturing of digital cameras.The surface of this kind of sensor is covered by a layer of color filter array,so that each pixel can only get one component,which is red,green or blue.The purpose of interpolation is to recover the lost color components.In this paper,current domestic and foreign research status in interpolation algorithm are introduced firstly.Then the basic principles of several common interpolation algorithms are analyzed.Software is used to test the performance of these algorithms.The main point is bilinear interpolation algorithm and gradient-based interpolation algorithm,which are implemented on hardware platform.The output is displayed on the screen.With top-down design approach,the interpolation algorithms are divided into several modules.The RTL design of the modules,including frame synchronization module,filter window module,bilinear interpolation algorithm module and color space conversion module,is completed by Verilog HDL.The functional simulation is processed using Modelsim software.Design synthesis,placement and routing are completed with ISE,which gives the structure of the RTL structure and the report of logic resources consumption.The design is implemented on Xilinx's KC705 FPGA development board.The results of functional simulation and FPGA verification show that the interpolation algorithms designed in this paper are correct and can be used to interpolate Bayer CFA images.After using the traditional method to implement the algorithms,the interpolation algorithm is also designed and realized by using the high-level synthesis design method.The shortcomings of the design and future research direction are pointed out at the end of the paper.