A stereo audio chip using approximate processing for decimation and interpolation filters

The growing demand for portable multimedia and communication devices has placed increased importance on low power solutions for DSP tasks such as filtering. At the algorithm level, power consumption can be reduced by use of approximate processing, where the filter length is reduced dynamically to adaptively reduce the switching activity per sample based on signal statistics.; In this thesis, a stereo audio chip using approximate processing in the digital decimation and interpolation filters to reduce the active power dissipation is presented. Several enhancements based on a traditional Harvard architecture programmable processor have been adopted to meet the high data-rate and low-power requirements of digital audio signal processing. Enhancements for power management based on an adaptive approximate filtering algorithm are described. The ROM instructions corresponding to FIR digital filter computation are configured through a 4-bit grade field to control the filter order update. The issue of instructions for the programmable processors is controlled by the adaptive approximate filtering scheme to reduce the power dissipation.; One pair of A/D converters and one pair of D/A converters have been integrated in a die area of 10.22 mm2 in a 0.5-um CMOS technology. The total power dissipation of these converters without power management is 200 mW when operated from a 5-V power supply. When the signal is fully active, power reductions of 36% for decimation and 17% for interpolation over fixed-order filters are demonstrated. When the signal is 40 dB below overload, power reductions of 67% for decimation and 44% for interpolation over fixed-order filters are observed. The power reductions are 83.1% for A/D converters, and 82.7% for D/A converters, when the signal is silent for a significant period of time.; Limitations on the application of approximate processing are considered. It is observed that the configuration of observation window for input stopband average power can impact the SNR performance under such power management schemes. Several architectural approaches are proposed to resolve such issues.