The Research And Design Of CMOS High-powered Electric Charge Pump PLL

This thesis concentrate on designs of electric charge pump PLL (Phase-Locked Loop) base on the chartered 0.35um processing, it belongs to the item, in which our tutor cooperates with the photoelectric technology research institute in Beijing University of Aeronautics & Astronautics to develop the integrated circuit of photoelectric sensor.Firstly, the article analyses all the models of PLL in Principle, then it analyses the construction and function of every kind of phase detector, electric charge pump, VOC(voltage controlled oscillator). Contrasting with the merit and shortcoming of different structure, we choose the best models combination according to the demand of tape out. And then concrete parameters of each applied structure are computed in theory, the whole simulation circuit construction is established finally. On the abovetheories investigation , the design improvement is proceed by cadence -IC designsoftware ,and then design of the electric charge pump PLL CMOS integrated circuit is finished. It is based on the chartered 0.35um processing, working frequency is 250 MHz, the occupy ratio of output waveform attains 50.49%. The analysis and simulation of all models are proceed, and the simulation result is provided. The simulation result indicates that the thesis meets the demand of the original functionrequest and satisfies the need of the item.