Font Size: a A A

Design Of Embedded 8-Bit Microcontroller

Posted on:2007-10-19Degree:MasterType:Thesis
Country:ChinaCandidate:Y S NiuFull Text:PDF
GTID:2178360185989461Subject:Instrumentation engineering
Abstract/Summary:PDF Full Text Request
This essay describes the process of designing embedded 8-bit microcontroller by top down method. It also describes in details various stages of front-end design in integrated circuit design by the sequences of design flow.System-level design is described in details in this essay from the angle of project management and circuit design. The key problem in system-level design is system specification, which describes everything about the system, based on which system-level design is done. According to RTL coding conventions, hardware description language will convert all functional modules in system-level design to synthesizable TRL codes and verify whether their functions are correct or not by simulating RTL codes. On a basis of system specification, synthesis constraint scripts and static timing analysis scripts are developed and logic synthesis will be done to the verified RTL codes by synthesis tools. They will then be converted to technology-dependent gate-level netlist to be analyzed by static timing analysis tools. This is done to verify if all timing paths can satisfy timing requirements. And then make gate-level simulation on gate-level net list verified by static timing analysis. Compare result of gate-level simulation and that of RTL codes simulation to ensure correct designed functions.All researches in this essay have symbolic significance. This is a most popular method in the world used in integrated circuit design and all have been verified by many tests. Therefore this topic has a widely application and is prospective.
Keywords/Search Tags:Top-down, System design, Logical synthesis, Static timing analysis
PDF Full Text Request
Related items