Research On Timing-driven-based Synthesis Technology

With the development of Very Large Scale Integrated circuit, circuit scale is more and more large, complexity is more and more serious, which has become a huge challenge to Electronic Design Automation. High level synthesis tool can choose best scheme in a large design space. Benefits of synthesis technology include:( 1 ) It can shorten design cycle and reduce design cost.(2) It can reduce error. Automatic synthesis tool after validation can eliminate error because of manual work.( 3 ) It can choose among several schemes.(4) It is adaptive to change of performance specification.When feature size comes to 0.35 m, interconnect delay has contributed 70% to total delay. Distribution of delay parameters lies on actual implementation of layout, which results in the fact that timing closure has become the chief problem. So synthesis technology must be based on timing to insure timing closure.This paper put emphasis on:( 1 ) Implementation of synthesis under different process.(2) Explore timing-driven-based synthesis method..(3) Implementation of static timing analysis.The results of research have been successfully applied to the design of 8-bit RISC MCU.