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Full Custom Design Of The Branch Target Buffer For X Microprocessor

Posted on:2006-08-13Degree:MasterType:Thesis
Country:ChinaCandidate:N BaiFull Text:PDF
GTID:2178360185963327Subject:Software engineering
Abstract/Summary:PDF Full Text Request
Branch Prediction is one of the key factors that affect the performance of microprocessor. In order to achieve high performance in our newly designed microprocessor (we call it X microprocessor), a high speed, low power and high precision dynamic BTB (Branch Target Buffer) is designed. I have chance to take part in the research work, responsible for the design of BTB.My research work can be summarized as follow:(1) Based on the study of the advanced theories of Branch Prediction and the requirement of X microprocessor, a speculated two_level adaptive branch prediction technique is adopted in the design of the BTB, and the realization framework of which is established.(2) Through the theoretical analysis, the paper confirms the design project of BTB's SRAM array, and defines the design of each subschema regarding the requirment of BTB's performance.(3) According to the requirement of BTB's design, the paper adopts the symmetrical clock tree technique. The paper also explores the minimal delay time of the clock tree and the most appropriate size of inverter in circuit. By using the word-line pulse technology, the paper enhances the speed and reduces the power of the BTB.(4) The paper establishes a model of power and pointes out the bottle-neck of low power in general TAG array and parallel accessing mode. In our design, we use a new type TAG array and serial accessing mode, which has superiority in power consumption.(5) According to the desire of BTB's function, the paper realizes a pseudo-LRU replacement algorithm and two-bit bimodal algorithm. The circuit has advantages in its simple structure, and small space.(6) The paper expatiates the technique of of BTB's layout, and discusses topics of floor planning, placement, routing, respectively. Finally, the paper validates the layout through simulation in circuit level.Achievements of the research can be directly applied to the operation of the microprocessor, which embraces practical significance, and accumulates experiences in the technology and theory of the full custom design, as well.
Keywords/Search Tags:BTB, Branch Target Buffer, High speed, Lower power, Full custom design
PDF Full Text Request
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