Font Size: a A A

Study And Implementation Of Reconfigurable Algorithmic Accelerate Component

Posted on:2006-12-20Degree:MasterType:Thesis
Country:ChinaCandidate:L DengFull Text:PDF
GTID:2178360185463451Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
With the development of informationalization in China, information security has won more and more concerns. Cryptogram programming of confidential information is an effective tool for ensuring information security. High performance cryptogram server provides a safe, highly effective platform of cryptogram programming of information. The capacity of encryption/decryption operation and the category of cryptogram-supported algorithms are the important indicator of cryptogram server. The thesis aims to carry out a study of improving flexibility and efficiency of a server by designing and realizing Reconfigurable Algorithmic Accelerate Component (RAAC) in high performance cryptogram server. The components, which consists of algorithmic accelerate component and algorithmic dynamic reconfiguration controller, is realized by FPGA.The thesis analyzes five kinds of configuration patterns of FPGA in Xilinx Company and then proposes RAAC (Reconfigurable Algorithmic Accelerate Component) dynamic configuration scheme after understanding their respective advantages and disadvantages. This scheme enables dynamic load of different encryption arithmetic according to application without stop of the system and therefore immensely enhance the adjustment and flexibility of the system.The thesis also studies on the software and hardware realization of RSA and DES arithmetic and then, in the light of the features of Xilinx FPGA, improves the two arithmetic, for which RAAC-RSA and RAAC-DES have been put forward. RAAC-RSA adopts improved systolic array to realize Montgomery arithmetic and, in this way, finishes the cardinal arithmetic of RSA, i.e. multiple module. While RAAC-DES adopts 18 stages pipeline, which can heighten encryption and decryption capacity of DES arithmetic effectively and conduct encryption and decryption at the same time.Lastly, the thesis introduces methods of coordination between two formulas and software and tests their performance at the confidential server 0127. Since the performance of the formula RAAC-RSA is related with choice of password, the thesis tests the performance of Montgomery and does performance analysis of RSA arithmetic formula in different computers. The practical tests have made the following conclusions: password and data are all 1024bit RAAC-RSA encryption arithmetic, and the performance 30.3Kbps. The performance of Montgomery is 32.2Mbps, while RAAC-DES can reach as high as 380.7Mbps. There are some distance between the tested performances and theoretical peak values because of high systematic cost and access memory delay, but they all satisfy the performance requirements of the confidential server .
Keywords/Search Tags:RSA, DES, Reconfigurable computing, Dynamic reconfiguration, Montgomery, FPGA
PDF Full Text Request
Related items