Design And Implementation Of A Remote Reconfigurable System Based On RapidIO Bus

Reconfigurable technology was introduced as early as the 1960s,but it was not promoted due to limitations in technical conditions at the time.In the 1980s,Xilinx in the United States invented the world's first FPGA,providing a common hardware platform for reconfigurable technology.The reconfigurable technology has been widely promoted and applied.FPGA-baed dynamic reconfigurable technology can reconFig all or part of its internal logic functions under the normal operation of FPGA,greatly improving the flexibility of FPGA system design,improving resource utilization and reducing system.Power consumption,system reliability and other aspects have important application value.In this thesis,the principle and implementation method of FPGA dynamic reconfigurable technology are deeply researched and analyzed,and the FPGA application system supporting local dynamic reconfiguration and remote dynamic reconfiguration is designed by modularization.The system uses Xilinx's Kintex Ultrascale series of FPGAs as the core processor,and uses Freescale's PowerPC as the main controller to form the "PowerPC+FPGA+SRIO"architecture,which has the advantages of high stability,high scalability and high versatility.The SRIO bus transmission bandwidth in this design can reach 1.023Gbytes,which provides a guarantee for the fast and fast switching of complex algorithms using high-speed dynamic reconfiguration technology.The implementation of remote dynamic reconfigurable system based on SRIO bus is the first in China.The thesis tested the designed system using QPSK and 16QAM modulation algorithms.The test results show that the local and remote dynamic reconfiguration functions are accurate and stable,and have the characteristics of good versatility,strong scalability and high reliability,and meet the design requirements.