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Design And Implementation Of The Timing Control Circuit For A New CMOS Image Sensor With High Performance And Wide Dynamic Range

Posted on:2006-09-25Degree:MasterType:Thesis
Country:ChinaCandidate:M S ChenFull Text:PDF
GTID:2178360182975198Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
CMOS image sensors have a lot of advantages over CCD, for instance, systemon a chip, random access, low voltage and low power dissipation. With thedevelopment of CMOS image sensors, they have been widely used in a great manyfields such as PC camera, digital camera, video phone, car airbag and fingerprintidentification.Research on CMOS Image Sensor with High Performance and Wide DynamicRange is an important project of Tianjin Science & Technology Committee. Theproject is a VLSI mixed signal circuit design, including pixel arrays, DPGA (DigitalProgrammable Gain Amplifier), A/D converter (Analog-to-Digital converter) andtiming control circuits. Design and implementation of the timing control circuit is mymajor work.The system design and implementation methods of timing control circuit for anew CMOS image sensor are proposed in the paper. Using dual-sampling pixelarchitecture, the CMOS image sensor can achieve both high frame rate and widedynamic range. Two efficient timing control methods(one named "roll exposuremode", and the other "parallel exposure mode") are introduced in the paper bycomparing their characteristics. Parallel exposure mode is used in the design.Following Top-Down IC design method, the design is divided into severalsub-modules, which are described in Verilog Language. After functional simulations,gate-level simulations of every sub-module and FPGA verification, the timing controlcircuit layout of CMOS image sensor is completed.The chip of CMOS image sensor has been fabricated in CHRT Corporation andit is in system test now.
Keywords/Search Tags:CMOS Image Sensor, High Frame Rate, Timing Control, Verilog, FPGA Verification
PDF Full Text Request
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