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Design Of Image Processing System For High Frame Frequency CMOS Camera

Posted on:2012-06-08Degree:MasterType:Thesis
Country:ChinaCandidate:L M SunFull Text:PDF
GTID:2178330332989455Subject:Optical Engineering
Abstract/Summary:PDF Full Text Request
High frame frequency camera can capture and record high-speed target. It can be used to analyze moving mechanism and details of the target by the recorded video, so it is applied widely in high-speed measurement field, such as aviation, aerospace and weapons. For supervising the instrument panel in the cabin and recording of missile lunching state outside the cabin of fighter, a high frame frequency CMOS camera image processing system was designed. This system was designed mainly to accomplish the problem of high frame rate, huge image noise, mass data.Main research contents of this dissertation included three parts as follows:high frame frequency image acquisition unit, image pre-processing unit and video coding unit.High speed CMOS image sensor LUPA-300 of Cypress Corporation was used in image unit and the FPGA of Xilinx Corporation was applied in controlling unit. CMOS image sensor configuration module, image buffer module and Camera Link high-speed data interface module were designed through Verilog HDL and top-down design methodology. Each module was designed respectively and connected through the top-level module, and it was simulated in Modelsim software.In image pre-processing unit, the image noise characteristics of the CMOS sensor was analyzed. The fixed pattern noise eliminating algorithm and two point multi-stage non-uniformity correction algorithm were researched. Improved median filtering algorithm program used Verilog HDL was implemented in FPGA.In video coding unit, the video coding compression algorithm based on MPEG-4 was analyzed. The coder controlled by VCM (video compression manager) was used to eliminate time and spatial redundancy. The program was implemented by VC++.At last, high frame frequency CMOS camera image processing system is established. Experiment results show the frame can reach 155 fps in a format of 640* 480 with the clock of 50 MHz. The image noise is eliminated effectively by the pre-processing unit. Then the video compression based on MPEG-4 is implemented by VCM.
Keywords/Search Tags:high frame rate, CMOS image sensor, image pre-processing, MPEG-4 video coding compression, VCM
PDF Full Text Request
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