Research Of Super-pixel CMOS Image Sensor

With the development of IC process technology and design methodology, thedensity integration of very-large-scale integration circuit grows drastically, whichgives CMOS Image Sensor (CIS) more potential than ever. As the resolution of thesensor and the needs for intellectual CIS increase rapidly, the traditional method ofdriving CIS with external waveforms becomes outdated. Thus it can no longer adaptto the rise of the complexity of the chip. As a result, CIS with intellectual functionswill become the future standard image device.This thesis raises a system design of super-pixel CMOS image sensor as anintellectual image device. Different from traditional CIS systems, this device isfunctioned to partially read-out the pixel array due to the location of the target signal.As a result, it is suitable for high frame-rate target detection.This paper details purposes and technologies of modules of the proposed system.For future designs of more complex intellectual CIS systems, this thesis can beconsidered as a cornerstone. This paper describes the circuit design of CIS moduleusing bottom-up technology, which is able to achieve globe shutter and randomaccess of pixel units. Moreover, this paper details the register transfer level code usingVerilog hardware description language (HDL) of the super-pixel control module,which function is based on the purpose of the design.Simulations and tests are conducted on different modules of the proposed CISsystem, including simulations and image test of the CIS module, and simulations,syntheses, static timing analyses and FPGA on-line test of the super-pixel controlmodule. Also, we verified that super-pixel technology is able to accomplish highframe-rate and fast target detection through integration test.