The Research Of Pipelined A/D Converter Based On Digital Error Correction

The system integrated chip with high speed A/D converter adopting the standard CMOS technology has become the crucial research direction. The research of the comparable high speed A/D converter in standard CMOS technology has also become the one of such emphases. This thesis is on the basis of the 0.35μm standard CMOS technology, and develops a 10-bit 20MSPS pipelined A/D converter, which is the part of high performance and high dynamic range CMOS image sensor project. The achievement has met the requirement of the high throughput for the CMOS image sensor. On the basis of the comprehension of the primary parameters, the thesis introduces and compares the common structure of the A/D converter, as well as their advantages and disadvantages. On the requirement for A/D converter of the image sensor, we adopt high throughput of the pipelined A/D converter. Extensively consideration for the area and its power dissipation, the structure design is consist of 4 stages pipelined containing 4bits and triple 2.5bits individually. The tasks of this thesis are shown as follows. 1. Analyzing the basic principles of the pipelined A/D converter and its constructions, we further study the effect on the performance of the pipelined A/D converter due to the error by means of the analysis of the S/H, comparator and the reduce amplifier. 2. Developed a low power, high accuracy CMOS dynamic comparator, it's the switched capacitor circuit which consist of the preamplifier and dynamic latch. High gain enhances the comparator's accuracy, meanwhile positive feedback increase the its speed. 3. Design a simple and testable redundancy digital error correction method. In this thesis, the pipelined A/D converter is adopted the EDA, and systematically simulation and layout design. Modules have been fabricated practically. The research has primarily attained the goal. The circuits of the comparator and digital error correction supply the theory and design principles for the high performance pipelined A/D converter in the standard CMOS technology.