Design And Signal Integrity Analysis Of High-speed Switching System Based On PCI Express Architecture

With the development of computer technology, especially the rapid development of computer networks, network traffic has been rapidly increasing. The demand for bandwidth is growing. The bandwidth of parallel bus cannot meet the current and the next-generation computer system requirements. Because of its high speed, scalability, and other advantages, Serial bus has begun to replace traditional parallel bus in some fields. However, with the trend of high-speed digital technology, signal integrity issues become increasingly more and more serious. These problems have brought great challenges to the design of system hardware. High-speed serial system have to face reflection, crosstalk, coupling between transmission lines, differential signals, simulation models, as well as propagation delay and other signal integrity issues. The success to the high-speed serial system design lies on whether we can cope well with the signal integrity issues caused by high-speed signal interconnects. So it is extremely important that the research and practical simulation of those signal integrity issues.The main content of this thesis is a detailed design of a high-speed serial switching system, and the problems of signal integrity existing in high-speed system has been studies theoretically and simulated. Firstly, problems may be encountered in the design of high-speed system are described. This thesis analyzes the current research status of signal integrity problems, finding a general method to solve such problems. And then after an analysis to architecture of PCI Express bus, the system architecture and each module are detailed designed. Secondly, this paper conducted a detailed way to resolve the signal integrity issues of the high-speed PCB. Finally, it studied a simulation program of high-speed PCB signal integrity. At the same time, it combined with this system design to make a simulating analysis on the key signal and network part, and presented a coping strategy in much higher-speed PCB design.