Signal Interity Analysis For The High Speed Serial Bus

Since the21st century, human beings entered the information age. Within a few years, the electronic product update cycle is more and more shortened. Becoming more and more powerful in function, the intelligent electronic equipment gradually develops in the direction of low power consumption, good portability, etc. at the same time. In order to satisfy the high speed circuit, stable, low power consumption and other technical indicators, PCB design requirements are stricter. In this case, the study of high speed bus and signal integrity is paid more and more attention by engmeers.In this paper, the software ANSYS, which is widely used in industry, is used to proceed the field and route collaborative simulation. By solving the model through the field analyzer, the equivalent subcircuit model is formed. Then, subcircuit model is linked to the route simulator to proceed the simulation. After that, the results of simulation in the route simulator are output to the filed simulator by encouraging push. And finally get the electromagnetic radiation and transmission characteristics when the system is working under the excitation source. During the process of simulation,3D models of differential lines, via holes and connectors are built. And combined with the chip’s IBIS model, the system level simulation of high-speed interconnection pathways is carried on. Also, the method that can reduce transmission line loss and the valuable experience during the via hole modeling are acquired during the process. At the same time, with the field and route collaborative simulation, the study verifies the necessity and reliability of the simulation link in the high-speed circuit design.