Study On Board-Level Signal Integrity Problem Of High-Speed PCB

With rapid development of modern electronic design technology, electronic system scale becomes larger and larger, speed becomes higher and higher while bulk becomes smaller and smaller. Smaller the IC bulk, faster the transistor switch speed and the signal operating frequency, the density of PCB is higher. So board-level SI is a more and more important key factor in electronic design.In this paper, first of all, we have reviewed the type of transmission line, structure of PCB, and analyzed the influence of PCB structure to signal transmission performance.Termination and crosstalk are some of key technologies of board level SI. In high-speed systems, one common design failure is caused by termination mismatch. So detail studies on termination problem have been done in this paper. Another common problem in high-speed PCB is crosstalk. After sufficient analysis of reason and harm of crosstalk, some measures are put forward to diminish crosstalk.Via impedance is often ignored in traditional high-speed PCB design. Impedance discontinuity of via will cause signal reflection, and this will leads to severe SI problems. After studies on basic theory of via, a new method named via impedance-controlled is provided in this paper. This method can effectively solve impedance discontinuity of transmission line. Simulation proves that this method is valid.In modern PCB design, type of power is more and more. And different power often coexists in one plane. After studies on basic theory and harm of signal traversing a power gap, provide measures of mixed-signal PCB design.Design scheme of PCB based on SI simulation has become mainstream design scheme. This paper explores methods of supercomputer's PCB design, presents common PCB simulation tools and design schemes, analyzes basic theory and construction method of simulation model, simulates practical example by EDA tools. All of this is a good explore for high-speed PCB design of key project.Traditional PCB simulation by loading SPICE model is very complex and hard to implement. Through loading IBIS model particularly, we have simulated key factors of bringing board-level signal integrity problems. But sometimes we can't find correct IBIS model for board-level simulation. By means of analyzing syntax format of IBIS model, we find that the correct model can be substituted by other model having the same I/O Buffer. Using this method we can solve the feasibility problem of board-level simulation.