| With the rapid development of the electronic technology and manufacturing process, Intel processors become more and more powerful. The innovation is not only the increase in the number of the cores and threads of the processors, but also the integration of more and more functions which were handled by chipset in the past. From integrating the memory controller on Thurley platform at the beginning to integrating the PCI-Express controller on the latest Romley platform, the Intel processors gain lower latency and higher performance. But at the same time, designers of the high-speed server system will encounter much more challenges than ever before. To make sure the signal integrity of high-speed digital circuit design becomes an important factor to the success of the design.In this paper, signal integrity verification and optimization process were taken after CPU upgraded to Ivy Bridge(IVB) processor on the 2-way server platform under test. Based on the study of the signal integrity theory, all high-speed design impacted due to the replacement processor, including memory subsystem, PCI-Express subsystem, QPI bus between the processors and the DMI bus between the processor and chipset, were analyzed. Different methods and validation tools were chosen for different parts, since their characteristics were different. By analyzing the results of the validation, we discovered some signal integrity problems brought by new processors. Research on the cause of these problems helps us to find out solutions to them. Finally we get the specific system to support new IVB CPU, which mean our product is upgrading along with this new Intel processors.In addition to using traditional eye diagram method to verify the signal integrity, we also introduce several new test methods based on the built-in test circuits in the processor. As the speed of the signals keeps increasing, validation method similar to these will become more and more popular because they won't impact the signal we want to test. |
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