The Research On SoC Test And Design For Testability

With the rapid development of microelectronic technique ,integrate circuit and system become more and more complex. Traditional test models and test methods are not competent for the times' require on account of the gigantic test expense. The traditional methods that test engineers develop their programs with the designed system can not satisfy today's testing require. Owing to the above factors,The paper researchs the mixed-signal test based on test performance, alleviating the burden of ATE and the design for testability.First, The paper researchs the tactics of diagnoses, the optimum seeking of test point,PODEM arithmetic and SCOAP estimate at SOC.And that,the manuscript develops the method that how to enhance the controlling of circuits by example and the modeling of high hierarchy in mixed-signal circuit.The key method to the SOC test is the mixed-signal testability synthesis.Further more,The paper put high importance to the design for testability such as scan test for digital system and mixed-signal system, built-in-self test and I_DDQ test.The advantage of testability synthesis to scan-test is which can perform function test , interlinkage test and existence test of component at board level.Test vectors generator,circuit under test and character analysis system of built-in-self test were realized in one chip with FPGA.The method is effective and high-speed which is demonstrated by using ModelSim and VeriLogger Pro software simulation and is an effective method to slove the embeded-system modules in SOC. The paper discusses the principle and approach of I_ddq test and how to deal with the invalidation of Iddq test on account of the decrescent characteristic line widths. A new diagnoses method were put forward based on aitificial neural network(ANN) and general multiple test condition(GMTC) and were good for module-level diagnoses in VLSI testified by MATLAB and ORCAD software simulation.This method accelerates the diagnose speed and can locates more little modules,even transistor-level, by repeating to using the method. At last ,The paper presents the hardware and software design of auto-test equipment which can locate the diagnoses in PCB and IC .The method of a sort of uniform AMS IC DfT technique with low test cost and high fault coverage will meet the need of further development on IC design.