Research Of High-resolution Time Stamp Readout Circuit For APD Focal Plane

Infrared focal plane device is the core component of infrared detection technology,Mercury cadmium telluride avalanche photodiode(Hg Cd Te APD)is one of the frontier researches on infrared focal plane technology.Due to its advantages of high gain,low excess noise,high sensitivity,and high-speed detection,it can realize laser active and passive detection,high-sensitivity detection and high-precision three-dimensional imaging.This article makes a detailed analysis of the key technology of the readout circuit(ROIC)that required to achieve the cooling infrared focal plane with highprecision time resolution.Research has been carried out on two ways to achieve highprecision time resolution: time to digital converter circuit(TDC)and time to voltage converter circuit(TVC).Based on CSMC 0.5?m 2P3 M process,the infrared focal plane circuit design and simulation,layout drawing,tape out and test verification have been completed.First of all,this paper analyzes the impact of low temperature(77 K)on the MOSFET device model,and revises the BSIM3v3 simulation model.On this basis,a vernier-type TDC is designed to achieve high-precision time measurement.The verniertype TDC accuracy is mainly determined by the accuracy of the comparator and the accuracy of the difference between the two delay chains.The design uses a high-speed comparator with a transmission delay of 10.01 ns,The worst value of the offset voltage at different process angles is 0.45 m V,which achieves 12 bit accuracy;The delay unit of the delay chain adopts a voltage-controlled structure to achieve full swing adjustment.The test results show that the circuit time accuracy at low temperatures reaches 236.28 ps.In order to reduce the noise impact caused by off-chip injection of high-frequency clocks,a charge pump phase-locked loop based on the on-chip generation of highfrequency clocks is designed,and the external input 10 MHz clock is multiplied to 120 MHz internal clock.In the charge pump phase-locked loop design,the voltagecontrolled oscillator adopts a differential symmetric structure to reduce the influence of circuit noise on the jitter of the phase-locked loop.Delay unit is added to the frequency discriminator to eliminate dead zones and glitches.The charge pump circuit adds a delay unit and a mirror current source to reduce mismatch.The circuit simulation shows that the phase noise is 109 d Bc/Hz @1MHz.The readout circuit structure of the Hg Cd Te APD detector with time-to-voltage conversion to achieve time accuracy is analyzed,and the theoretical calculation method of time-to-flight(TOF)is studied.On this basis,we built a set of high-precision time calibration test platform,the test system and environmental noise are calibrated,and the time jitters introduced by the system noise is 179 ps.The fixed time delay caused by the test instrument is calibrated,and the parameters such as the voltage,capacitance,the accuracy of the ramp generator and the accuracy of the high-precision voltage source that affect the TOF accuracy are theoretically analyzed.A three-dimensional imaging test is carried out with a coupled medium-wave mercury cadmium telluride APD detector.At a working temperature of 77 K,the test result shows that the circuit linearity is as high as 99.9% at low temperature,the saturated charge capacity is 7 Me-,and the root mean square of the time accuracy jitters is 2.107 ns.