Design Of Time-to-Digital Converter In All-digital Phase Locked Loop For NB-IoT

With the development of the semiconductor technology and the scaling of feature size,the application of the digital integrated circuits is becoming broader as its advantage of low cost and easy to integrate is more and more prominent.In the field of radio frequency communication,as the replacement of analog phase locked loop,the idea of all-digital phase locked loop is proposed,becoming an attractive research topic both in academic and industry.The time-to-digital converter is a device for measuring time and providing a digital representation of the time.Therefore,it is usually used as a phase/frequency detector and charge pump replacement in an all-digital phase locked loop,making it possible to realize the system of all-digital phase locked loop.Hence,the research of time-to-digital converter has great significance.The time-to-digital converter(TDC)applied in the all-digital phase locked loop system of narrow band Internet of Things(NB-IoT)is based on TSMC 40 nm CMOS process.The time-to-digital converter designed in this thesis is composed of edge aligner,pseudodifferential inverter delay line,flip-flop,clock tree and decoder.This TDC adopts a pseudodifferential digital architecture and sense-amplifier-based flip-flops for sampling,which makes it insensitive to nMOS and pMOS transistor mismatches.On the one hand,the clock tree provides balanced clock signals for flip-flop module,on the other hand,it compensates for the influence of transition delay of edge aligner.The decoder,which is at the end of system,transfers the result of quantization into binary code.After the analysis of schematic and layout,the thesis presents the whole schematic,layout,pre-layout and post-layout simulations.Post layout simulation results of time-to-digital converter show: under 0.9V supply voltage,and the reference clock of 40 MHz,the time-to-digital converter functions normally,time resolution is 21 ps,dynamic range is 1344 ps,differential nonlinearity is less than 1 LSB.The time-to-digital converter designed in this thesis meets the requirements of the target,so it can be applied to the system of all-digital phase locked loop for NB-IoT.