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High-speed High-resolution CCD Analog Front End

Posted on:2018-01-09Degree:DoctorType:Dissertation
Country:ChinaCandidate:H Y ZhuangFull Text:PDF
GTID:1368330542993473Subject:Microelectronics and Solid State Electronics
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Because of the great light sensitivity and the perfect image quality,CCD(Charge Coupled Device)cameras are widely used in many applications.CCD cameras can be used in optical imaging reconnaissance satellites.This kind of satellites take high-resolution photos of objects on the ground,by using infrared cameras,visible-light cameras,and so on.In the past,optical imaging reconnaissance satellites use films to store images,and people cannot get these images before retrieving the films.Now,optical imaging reconnaissance satellites use CCD cameras to take photos,achieving not only high resolution pictures,but also real-time transfer of the pictures.In a CCD camera,the whole system of image processing is made up of four parts:CCD sensor,CCD analog front end,digital signal processor,clock driver.Among these four parts,the CCD analog front end is at the intersection of analog and digital worlds,and thus determines the image quality of the generated photo;therefore,the CCD analog front end is an important part in the whole system of image processing.Besides,due to the advancement of technology,CCD sensors has increasingly high sampling rate and sampling resolution;hence,it is necessary to design a high-speed high-resolution analog front end,so that it can work with the high-speed high-resolution CCD sensor.And for decreasing size,power,and weight of the image processing system,the analog front end also must be highly integrated,moving some board-level parts into the analog front end chip.Currently,high-performance CCD analog front end chips from abroad usually have sampling resolution of 12bit~14bit,and sampling rate of smaller than 40MHz.By comparison,Chinese companies and institutions still have not produced their own CCD analog front end chips,while facing embargo policy against China.Therefore,it is highly important to do research on high performance CCD analog front end chips.To this end,Chinese government has started a state key project of scientific research on CCD analog front end chips,with a lot of funding.To fulfill the task of this project,this paper has designed a 14bit 40MHz CCD analog front end chip,whose specification is similar to those high-performance products from abroad.This analog front end chip has integrated 8 parts:DC restoring circuit,CDS(Correlated Double Sampling)circuit,VGA(Variable Gain Amplifier)circuit,ADC(Analog to Digital Converter)circuit,bandgap reference circuit,precision timing generator,horizontal driver,register array.Among these 8 parts,the DC restoring circuit can restore the CCD reference voltage to 1.5V.The previously separated CDS circuit and VGA circuit are combined together into one circuit by using new techniques,which greatly reduces complexity,area,and power consumption of the chip.The VGA gain range is from 0d B to 18dB,providing512 different gain values which can increase linearly with the programming code.The pipelined ADC has digital output of 14bit binary code;and the MSB is for overflow judgment,while the remaining 13 bits represent the CCD signal value.The new bandgap reference circuit improves the temperature coefficient of reference voltages which are provided to CDS,VGA,and ADC circuits.The precision timing generator can equally divide the main clock period into 48 parts,so that the edges of important clocks can be accurately programmed to appropriate positions.Horizontal driver is for generating horizontal clock signals,which are sent to the CCD sensor.Register array is for programming the whole analog front end chip,so that it is possible to change the operating mode of different parts,the rising/falling edges of clock signals,the driving capacity of the clock driver,the optical black clamp,the VGA gain value,the encoding format of the digital output signals(binary code or Grey code),and so on.Based on SMIC 0.35?m 3.3V CMOS process,simulation results show that:with 0dB VGA gain value,the CDS circuit has SNR of 102.49dB,and ENOB of 14.03bit;the pipelined ADC has SNR of 78.94dB,and ENOB of 12.63bit;the bandgap reference circuit has a temperature coefficient of 12ppm/°C.All of these performance satisfies the system requirement.Finally,measurement results shows that this CCD analog front end chip works very well,occupying area of 2.89×3.48mm~2(including Pads).After building a CCD camera and taking a photo,the PSNR(Peak Signal-to-Noise Ratio)is 43dB.In comparison with high-performance products from abroad,this chip has its advantages on PSNR,sampling resolution,and integration level.
Keywords/Search Tags:CCD image sensor, CCD analog front end, charge coupled device, correlated double sampling, variable gain amplifier, pipeline ADC, MDAC, overflow judgment
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