Research Of Waveform Digitization ASIC Based On Switched-Capacitor Arrays

As the most direct and effective method,waveform digitization is able to provide the most comprehensive information of the detector output signals for physics scientists.Traditionally,fast Analog-to-Digital converters(ADCs)were often employed for waveform digitization.However,the increase of channel number in large scale experiments precludes high speed ADCs,which suffer from high power dissipation,low density,as well as high cost.As an alternative approach,the Switched Capacitor Array(SCA)ASIC(Application Specific Integrated Circuit)sample waveforms at a high speed while quantizing the sampled voltage with a comparatively lower speed,which guarantees both high sampling speed and low power consumption.In SCA based waveform digitization,the key task is the design of the ASIC,which is a research hotspot in this domain worldwidely,especially in application for high precision time measurement,more and more attention is paid on the progress of SCA ASIC design.So far,several SCA ASICs have been designed and some of them were used abroad,and domestic exploration in this field has also begun.Based on the investigation and study of typical SCA ASICs,this dissertation aims at high precision time measurement application and focuses on the design of prototype ASICs based on the SCA architecture.Besides,to address the mismatches among sampling cells in SCA,a novel time calibration method is proposed.This dissertation is organized as follows.The first chapter introduces the characteristics and development trend of front-end electronics in particle physics experiments.By analyzing some examples of physics experiments ultizing FADCs and SCAs,it is clarified that waveform digitization will play an important role in front end electronics.Finally,the main content of this dissertation is outlined.The basic working principle of the SCA is introduced in the second chapter.Some typical SCA ASICs are discussed with their structures and performance presented.Based on this,the development trend of the SCAASIC and its application prospects in the field of high precision time measurement are summarized.In the third chapter,the design scheme of the SCA ASIC in this dissertation is presented according to the application requirements in high precision time measuremet.And the key circuit blocks in this ASIC are introduced in the chapter Four,such as sampling and hold circuit,cell readout circuit,quantization circuit,sampling clock generation circuit and data readout circuit.The layout and the package of this ASIC are also introduced in this chapter.Test results of the SCA ASIC are presented in the fifth chapter.The results indicate that a sampling speed up to 5.2 Gsps is achieved,with an analogue bandwidth of above 400 MHz.Its performance in time measurement is also evaluated,and time resolution is better than 10 ps with the before mentioned new calibration method employed.Finally,the last chapter summarizes the work of this dissertation,and presents the plan for further research in this direction.