Research And Design Of Waveform Sampling Chip Of Pixel-Level Switched Capacitor Array

With higher brightness and shorter pulses than third-generation synchrotron radiation sources,the Free Electron Lasers will open the door to new research opportunities in physics,chemistry,materials science and biology,providing research areas never approached before.The European X-Ray Free Electron Laser(XFEL),already in use,produces ultra-short,highly coherent X-ray pulses that can provide atomic-level imaging of ionizing radiation for various materials.For European XFEL high-angle resolution experiment,special detector chips need to be developed to meet the requirements of single shot imaging,frame storage close to 2700,frame rate greater than 4.5MHz(Mega Hertz)in single shot imaging mode,pixel size less than 160?m×160?m and so on.Therefore,this paper designed a Pixel-Level Switched Capacitor Array(SCA)waveform sampling chip on domestic GSMC 130nm to meet the experimental requirements of European XFEL high Angle resolution,and conducted test and data analysis for the chip.The main work includes:1.Design of Pixel-level SCA waveform sampling chip.This chip integrates Topmetal technology,Monolithic Active Pixel technology and waveform sampling technology of Switched Capacitor Array.The chip consists of a 32x32 pixel array and a read-write control circuit.Each pixel is integrated with a exposed Topmetal,a PN junction and a 32x32 Switching Capacitor Array.The exposed Topmetal and PN junction are used to collect charge,and the Switching Capacitor Array is used to store waveform signals.In this chip,the 32x32 switching capacitor array within each pixel and the 32x32 pixel array are read and write with rolling shutter mode.In order to avoid the influence on the charge collection of PN junction,the device with N well is not used as far as possible in the design,and the sampling switch is realized by NMOS tube.The sampling capacitance is realized by NMOS tube,which reduces the pixel size while ensuring the capacitance value,and improves the chip integration.2.Research and design of the layout and wiring of the whole chip.Shielded technology was used to avoid the influence of noise on the sampling capacitor.A grounding metal block was used above the capacitor to shield the coupling of the upper digital signal line.The PGR(P-Type Guard Ring)was placed around a single switching capacitor to isolate the crosstalk of adjacent switching capacitors.The chip layout has a size of 5570?m×5700?m,with a size of 150?m×156?m for a single pixel and 4.7?m×5.1?m for a single sampling unit.After the layout is completed,Design Rule Check,Electrical Rule Check,Layout Versus Schematic,Parasitic Parameter Extraction and post-simulation of the circuit are conducted.3.Design and build the chip test system,and tested the chip.A test system is built for the chip test,including chip binding board,mother board,FPGA function board,signal generator and oscilloscope.The binding board with filter to reduce the noise of connected power supply is equipped with a chip,which connects the chip interface to the PCB board.The FPGA function board configures the control signal and provides the input reference clock for the chip.The test includes DC noise,DC transmission function,sine wave sampling and recovery.Test results indicate that:the fitted DC transfer function agrees with the theoretical analysis,the dynamic input range of the chip is about ?,the frame rate can be up to 10MHz in single shot imaging mode,the DC Noise is about 3.6mV,the original signal waveform can be recovered well after the sine wave signal is sampled.The Pixel-Level Switched Capacitor Array waveform sampling chip designed in this paper is capable of single shot imaging,with a frame storage capacity of 1024 images,a pixel size of only 150?m×156?m,and a frame rate of 10MHz in single shot imaging mode.It is expected to provide a solution for the design of pixel chip of free-electron laser detector.