Research On Automatic Calibration And Correction Method For TIADC System

High speed waveform digitization is an important research direction in nuclear electronics and many other domains.The basic idea is sampling the input waveform directly and extracting the signal information through digital signal processing.Time-interleaved analog-to-digital conversion(TIADC)technique employs multiple analog-to-digital converters(ADCs)with different sampling phases,in order to achieve a system sampling speed well beyond single ADC chips.Nevertheless,the dynamic performance of the TIADC system is inevitably deteriorated by the mismatch errors between different ADC channels,so the mismatch error correction becomes a key technique in TIADC research.In previous research,there have been a lot of work devoted to mismatch error correction algorithms for different applications.For example,the perfect reconstruction correction algorithm can achieve broadband mismatch error correction.However,these correction algorithms are usually suitable for constant means mismatch errors at a fixed temperature condition,causing application limitation of these methods when facing varying amibient temperatures with unconstant mismatch errors.Therefore,it is an important task to research on the mismatch error calibration and correction technique under variable temperatures.This paper focuses on two aspects of the task.1)As mismatch error would change with temperature,it is necessary to propose a method to automatically calculate the coefficients of the error correction filters according to the calibration results over different frequency points and different temperatures.2)In previous work,the calibration of mismatch error is usually carried out by a combination process on hardware and software.The calibration signals are sampled by hardware while the mismatch error coefficients are calculated by software,and this process is complex and consumes much time.So it is favorable to design an automatic calibration method based on hardware implementation to improve the calibration efficiency.This paper presents solutions for the above two questions.According to the temperature sesnors,the mismatch error parameters are calculated through interpolation using the calibration results in a Look-Up-Table(LUT),and then the correction filter coefficients by solving the perfect reconstruction function in a Field Programmable Gate Array(FPGA)device.Besides,a hardware logic was also designed and implemented in the FPGA for automatic calibration process of the system.In addition,a 20-Gsps TIADC system was designed for the verification tests.This paper is organized as follows:Chapter One is the introduction.The wa-veform digitization technique,and structures of several typical high-speed ADCs are introduced.Meanwhile,the basic principles of TIADC system are also presented.Chapter Two is the review of mismatch correction algorithms for TIADC systems,including foreground and background calibration and correction methods.According to the application requirements,the focus of this paper is presented,which is to achieve automatic adaptation of correction coefficients under a variable temperature condition,and to design an automatic calibration method for TIADC systems.Chapter Three presents the scheme design.Based on the broadband perfect reconstruction correction algorithm proposed in previous research,the scheme of automatic calibration,real-time correction,and automatic adaptation of correction coefficients in variable temperature environment are designed.Chapter Four presents the hardware design of a verification system,a 20-Gsps 12-bit TIADC system based on two 10-Gsps ADCs working in parallel.To achieve good performance of the overall system,simulations were conducted in hardware design.Chapter Five presents the hardware logic design.In the above verification system,the FPGA logic for automatic calibration and real-time correction is designed.The optimization of logic structure,layout,and routing are also presented.Chapter Six presents the testing results.The results indicate that the the calibration and correction method works well,and the effective number of bits(ENOB)of the verficaiton TIADC system is 8.7 bits at 647 MHz,8.5 bits at 2.4 GHz and 7.2 bits at 5.9 GHz.Chapter Seven summarizes the research work and outlines future work plan.