Research And Design Of ASIC Of Photon Time Of Flight Measurement

With the development of science and technology,the measurement technology of photon time of flight has been widely used in the fields of communication storage,laser measurement,military defense,agriculture and rural areas,and biomedicine.Microchannel board is a kind of excellent photodetector device.Its high time resolution,high spatial resolution,high gain and low noise make it have significant advantages and value.Microchannel plate detectors are used to detect photons and converting optical signals into electrical signals.The readout circuit chip processes electric signals to realize the function of recording time.It is an inevitable way to directly integrate MCP with high performance area array readout integrated circuit chip.The main content of this thesis is to design a photonic time-of-flight measurement application specific integrated circuit chip,and complete the process of theoretical analysis,circuit implementation and layout design.The photon time-of-flight measurement system uses the time-of-flight principle.The photon time of flight is the time interval between START and STOP.So the principle of the analog front-end circuit AFE is discussed in this paper,and two types of front-end circuits with low-time error analog front-end circuit and low recovery time analog front-end circuit are implemented.The low recovery time analog front-end circuit achieves a dead time of 7ns.This paper also proposes a time-to-digital converter TDC with high time accuracy,which innovatively uses a combination of coarse counting and fine counting measurement circuits.This method makes full use of the structure of the delay unit,and realizes the control of the delay time difference between the fast delay chain and the slow delay chain by adjusting the current,ensuring the time measurement accuracy of 50 ps.The photonic time-of-flight integrated circuit chip proposed in this paper is composed of pixel array,column memory FIFO,low-voltage differential signal interface circuit LVDS,and delay phase-locked loop circuit DLL.The pixel unit is composed of an analog front-end circuit AFE,a time-to-digital converter TDC and TDC_B,and a pixel FIFO.The AFE converts the input charge into a voltage signal,uses two comparators to implement the comparison function and the noise reduction function,and generates STOP and STOP_B signals.TDC and TDC_B measure STOP and STOP_B,respectively,and send the generated data to the pixel FIFO for storage.Subsequently,the data in the pixel FIFO is transferred to the column FIFO.These data are output serially through the low-voltage differential signal interface circuit LVDS.LVDS also provides sufficient driving capacity and response speed.The delay phase locked loop circuit DLL is a system clock generation circuit that can convert a 40 MHz differential clock into a 640 MHz high-speed single-ended clock for internal use.A high-frequency clock signal is provided to each pixel through a clock tree.This article uses SMIC 0.13?m CMOS process to implement the circuit.The pixel array scale is 6 × 6,and the chip area is 5mm × 5mm.The supply voltage of the system is 1.2V.The system's circuit recovery time can reach 7ns,the minimum detection current can reach 200?A,the area of ??a single pixel is 500?m × 500?m,and the power consumption of a single pixel is 5.846 mW.Finally,the measurement function of photon time of flight is realized,and the time accuracy is 50 ps.