Study On High-Speed High-Precision Switched-Capacitor Amplifier Circuit

ADC is the interface between analog signal and digital signal. Comparing with other most ADC architecture, the pipeline ADC achieves high-speed input performance and fast processing capabilities, Pipeline ADC is composed of some low-resolution sub-ADC converter (per-stage resolution of 1 to 1.5). Every sub-ADC converter develops a digital output corresponding to itself. By computing these low-resolution digital output values appropriately, the ultimate high-resolution digital output value can be gained. To facilitate the conversion later, a 2 times error amplifier is needed to maintain the signal in the appropriate range. Therefore, in the pipeline ADC converter, it is necessary to design an accurate plus / subtraction and gain function circuit. These functions can be achieved by a switched-capacitor gain structure whose nuclear structure is a OTA.ADC is the interface module between analog circuit and digital circuit, and sampling/holding circuit (S/H) is the core module in the whole ADC. Along with technological development, a high-speed high-precision pipelin ADC has become the goal, therefore, a high-speed high-precision S/H circuit is particularly important.In this paper, a fully differential switched-capacitor amplifier is designed which achieves S/H function. Such structure can eliminate DC bias and dual harmonic distortions, inhibit the common-mode noise from the substrate. In this structure, a cascode gain boosting amplifier is designed to harmonize the problems between limited gain and setting time of amplifier.In this paper, a new switch-capacitor circuit with reduced sensitivity to capacitors' mismatches was presented. The technique was based on sampling fully differential input signals via the both plates of the sampling capacitors using OTA in two phases. To reduce the unwanted effects of the parasitic capacitors and also the switches' charge injections, a compensation circuit was creatively incorporated on it.In addition, a current-mirror OTA was provided. It's output impedance is increased by reducing the bias currents of the output branches, which is realized by shunting partial mirror currents away. These shunt currents are then reused to realize the second input stage. Finally, the push-pull output stage further enhances the gain. The criteria for determining the circuit bandwidth and gain parameters are discussed. The OTA with high performance provides the switch-capacitor circuit with good amplifier.The ADC was sent to tape out in May 2007 and the chip returned in October 2007. The test on the chip has completed and the test result is the same as the layout simulation result. Taping out is successful.