Font Size: a A A

Research And Design Of RF Front-end Circuit For Ultra-wideband Wireless Communication System

Posted on:2013-10-03Degree:DoctorType:Dissertation
Country:ChinaCandidate:S C DuFull Text:PDF
GTID:1268330425483964Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
Ultra Wide Band (UWB) technology, which has been developed rapidly in the field of wireless communication, is a new type of wireless communications technology. It attracts more and more attention from Communication Field for its high-speed, high capacity, low power consumption and cost, and will be used widely. Therefore, studying and improving Ultra-Wide Band radio communication circuits has important scientific and practical significance for the development of wireless communication.This dissertation mainly focuses on the study of multi-carrier orthogonal frequency division multiplexing(Multi-Band OFDM, MB-OFDM) of Ultra Wideband(3.1-10.6GHz) RF front-end, including the three main components such as a low noise amplifier, a mixer and a frequency synthesizer. The main innovative work of this dissertation is as follow.(1) This dissertation proposes a3.1-to10.6-GHz ultra low noise and high linear UWB LNA circuit. The LNA circuit is mainly composed of two components:the first stage is the input matching stage, employing a common-gate structure to realize broadband input matching; the second stage is the amplification stage, using an improved cascade structure which can get a good gain and at the same time reduce the supply voltage requirement. By the use of the LC peaking technology and interelectrode series LC peaking technology, the circuit has obtained good gain flatness in the whole frequency band. The circuit uses the Cadence software to simulate as well as employing the Chartered0.18u m RF CMOS process. Simulation results show that the proposed UWB LNA achieves a good input and output match (S1K<-9.5dB, S22<-8dB), power gain of11.3-15.3dB, minimum noise figure of2.75dB, a power consumption of17mW under a supply voltage of1.5V.(2) This dissertation proposes a3.1-to10.6-GHz ultra low voltage and low power consumption UWB LNA circuit. The LNA circuit is mainly composed of two-stage common-source amplifier and an output buffer. It has realized the input matching by using the LC filter network and obtained lower power consumption and higher gain in the entire frequency band by employing the current reuse technology. The circuit uses the Cadence software to simulate as well as employing the Chartered0.18μm RF CMOS process. Simulation results show that the proposed UWB LNA achieves a good input and output match (S1K<-10dB, S22<-10.5dB), power gain of15.5-17.5dB, minimum noise figure of2.8dB, a power consumption of6mW under a supply voltage of IV.(3) This dissertation proposes a3.1-to10.6-GHz ultra low power consumption and high linear UWB Mixer circuit. The Mixer circuit is based on the tradition of Gilbert unit and achieves good performance in supply voltage, power consumption, conversion gain and linearity by employing multiple-input-branch technique, folded topology and a CS output stage. The circuit also uses the Cadence software to simulate as well as employing the Chartered0.18u m RF CMOS process. Simulation results show that the proposed UWB Mixer has a conversion gain of10±dB with a power consumption of2.4mW under a supply voltage of1.2V, SSB noise-figure(NF) of7.1-7.8dB,and IIP3better than7.19dBm.(4) This dissertation proposes a3.1-to10.6-GHz non-inductive UWB frequency synthesizer circuit. The circuit has two structural characteristics:the first is that it only includes a phase-locked loop and two broadband single-sideband mixers, and it is not necessary to add a filter network on the final stage of single-sideband mixer to improve the purity of the output signal. The simplified structure will contribute lower circuit consumption, less area and cost reduction. The second is that a non-inductive quadrature ring oscillator and two-pass non-inductive double-sideband mixer, which form one single-sideband mixer, are adopted in the phase-locked loop to further reduce the circuit complexity, layout area and power consumption. The circuit uses the ADS software to simulate as well as employing the TMSC0.18u m RF CMOS process. Simulation results show that the UWB frequency synthesizer can produce from3432MHz to10296MHz frequency, conversion time between the carrier frequencies is approximately2.5ns, the spurious signal power in the output does not exceed-30dBc.
Keywords/Search Tags:UWB, RF front-end, LNA, Mixer, Frequency Synthesizer, CMOS
PDF Full Text Request
Related items