Frequency Synthesizer Used In The Mb-ofdm Uwb System Research And Design

This master thesis presents the design of a monolithic CMOS frequency synthesizer for MB(Multi-band)-OFDM(Orthogonal Frequency Division Multiplexing) UWB(Ultra Wide Band)transceiver in the aspects of system, loop optimization and circuit implementation, respectively.First, a review of the history about the development of UWB communication is given. Since MB-OFDM has become one of the most prominent proposals which has receives great supports from the industry, an introduction and corresponding specifications for frequency synthesizer is followed. Based on the analysis and comparison of different architectures, this thesis proposes a new structure which reduces the numbers of high frequency divider and hence the power dissipation. A passive filter is also incorporated to improve the spurs performance.Then the loop filter design procedure and phase noise optimization of the synthesizer are quantitatively analyzed, respectively. By choosing the optimum open loop bandwidth, a minimum phase noise can be achieved.Further more, the building blocks including PFD, charge pump, VCO(Voltage Controlled Oscillator), divider, passive poly phase filter, high frequency selector and Single Side Band (SSB) mixer in the frequency synthesizer are discussed in detail. In the discussion, we focus on the two most important blocks: VCO and SSB mixer. Both prototype comparison and phase noise analysis are applied to VCO, a design guideline is given. I/Q mismatch and trans-conductance nonlinearity are analyzed in detail for the SSB mixer to excavate the incisive insight for the designer with respect to spurs performance.The final chapter gives the testing results of the system realized with 0.18μm CMOS RF technology and the summary of the design and testing results which are the good reference for the further research work.