Research And Design Of Amplitude Frequency Circuit Of Rf Front-end Based On CMOS Technology

With the rapid development of mobile communications,phased array technology has become more and more popular due to its flexible and fast beamforming and beam scanning features,and the RF front-end chip has important research significance as an indispensable key module in the phased array.At the same time,CMOS technology has attracted much attention in the field of microwave and millimeter wave integrated circuits due to its advantages of low cost and high integration.Therefore,this article has conducted in-depth research on the amplitude-frequency circuit in RF front-end chips based on CMOS technology.First of all,this article introduces and analyzes the basic knowledge of attenuators and mixers,including the basic principles,performance parameters and basic structure of the respective modules.Afterwards,based on the introduction of the basic structure in the previous article,the corresponding optimized structure is proposed for the insertion loss,linearity,additional phase shift of the attenuator,and the gain and linearity of the mixer.It laid a theoretical foundation for the design of the specific attenuator and mixer in the following.Through the accumulation of previous theoretical knowledge,this article first studies and designs the RF front-end chip attenuator module used in the next generation mobile communication system.In order to solve the inherent additional phase shift of the switch attenuator,the bypass capacitor of the parallel branch is introduced and the insertion loss of the attenuator is reduced through a simplified T-shaped structure.Finally,a six-bit passive attenuator is realized under the 65nm CMOS process.The attenuator,in which the additional phase shift is less than 3°,the attenuation error is less than 0.3dB,has the advantages of low phase shift and high accuracy,which verifies the rationality of the attenuator structure used.Finally,a broadband downmixer with high linearity and high isolation is also designed based on the 65nm CMOS process in the transceiver RF front-end chip applied to the Ka-band.In order to meet the system's requirements for linearity and broadband,a ring-shaped passive mixer structure is adopted as the mixer core.In the second stage,the common source stage buffer is used for gain compensation,and the final stage uses active balun output to saves chip area and reduces costs.Finally,when the radio frequency(RF)frequency is 27GHz and the LO frequency is 21GHz,its voltage conversion gain(VCG)is-3.5dB,IP₁dB is-2dBm,and the 3dB IF bandwidth covers the entire IF frequency band,and LO-RF and LO-The isolation of IF is greater than 45dB.