The Research On The Critical Memory Technology Of Microdisplay-on-silicon

The microdisplay is the first choice of the ieal portable display due to itssmall volume, light weight and low power consumption. The high-density activematrix, peripheral driving circuit and controller for displaying can be integratedin single chip for microdisplay-on-silicon based on monocrystalline siliconbecause of high carrier mobility and mature integration technology of CMOScircuit, which effectively raises the pixel density, reliability and stability. As theintegration level and expectation for long battery life increase, the powerconsumption becomes a critical problem to chip design ofmicrodisplay-on-silicon. The critical memory technology ofmicrodisplay-on-silicon based on the optimal scan algorithm, including thememory architecture, the strategy for low power consumption and thelow-power circuit design of flash memory, is deeply researched in the paper. Themain research contents are:1. Aiming at the performance gap between image processing logic andoff-chip memory for frame data, and high power consumption problem causedby driving large capacitor between chips, a high-energy computing in memoryarchitecture is presented in the paper. The architecture integrates the processinglogic and memory in a single chip, taking use of wide width and small signaldelay of on-chip memory, which not only raises the parallelism of processinglogic but also lowes the power consumption of the system.2．Seek the source of power consumption and influence factor starting fromthe power consumption model of CMOS circuit. Analyze the pricinple ofoptimization technique of a variety of dynamic power consumption and staticpower consumption. Based on the aforementioned analysis, the design strategyof low power consumption flash memory is presented according to thecharacteristic of flash memory. These strategies include:(1) Adopt varioussystem pattern(work pattern, standby pattern, power-off pattern and deep-downsleep pattern) in order to generate different low-power states,(2) Adopt designmethod of asynchronous circuit structure, which sufficiently reduces thedynamic power consumption generated by clock reversal and static powerconsumption caused by clock waiting,(3) Adopt the techniques of low powersupply and multi threshold voltage to enable the system with low powerconsumption undrer the condition in which the high performance can beguaranteed,(4) Add the enable signal to control the subcircuit module that is notat work pattern in sleep state, which reduces the dynamic power consumption. Ifthe method of enable signal is combined with muti threshold technique, thesystem may have ultra-low power consumtion. 3. Based low power consumption strategies, a low-power circuit design offlash memory with the mirror adopting technique of separation of gate and drainand the LDO using three loop paths for controlling, is presented in the paper.The sense amplifier consisting of the presented mirror with the separation ofgate and drain and high-performance dynamic comparator not only gains highread precision, but also obviously reduces the power consumption due to lowpower supply and access current. The LDO based on three loop paths controladopts capacitor couple effect and self-adapt reference technique, which thusenhances the response speed and further accelerates power on time of flashmemory for quickly entering into work pattern, and simultaneously its powerconsumption, is small due to low static current. While these critical circuitssatisfy the requirement of flash memory of low power supply and low powerconsumption, they also provide important reference value for other application.4. The design on OLED-on-silicon microdisplay system is researched in thepaper, which is taken as an important application and verification platform forthe presented computing in memory architecture and the flash memory based onlow power consumption design. The design, circuit realization and layout designand verification of optimal display controller and display driver are in detaildiscussed. Because the integration level of chip is high, the design method thatcombines full-custom method with semi-custom method is used. For criticalcircuits, full-custom method is chosen, and for non-critical circuits, thesemi-custom method is used, and its design levels is logic level, its output isgate level netlist and in the end layout is done in top level of the system.