Research On QC-LDPC Decoding For NAND Flash Memory

The rapid development of information technology is promoting the progress of fields such as big data,cloud computing,and the Internet of Things.The explosive growth of information in all walks of life has increased the demand for data storage.The development of data storage not only strives to expand the storage system capacity,but also puts forward higher requirements for the reliability of the system.NAND flash memory has many advantages such as high storage density,fast read and write speeds,and low power consumption.The internal unit structure is suitable for solid-state mass storage.As the flash memory technology continues to reduce the size of memory cells,the number of data bits stored in each cell by multi-bit storage technology continues to increase,and so does the storage density of NAND flash memory,resulting in serious bit error rate and affecting the reliability of the flash memory system.At present,LDPC codes whose performance is close to Shannon limit have been studied instead of BCH codes as an error correction code scheme for NAND flash memory to improve the reliability and extend the durability of the chips.This thesis focuses on the decoding algorithm of LDPC codes,and studies the LDPC code error correction scheme applied to NAND flash memory.This thesis introduces the working method and principles of flash memory,and summarizes the types of errors that may occur during its operation.The influence of the error interference during the P/E cycle operation on the cell threshold voltage distribution is analyzed by simulation,and the flash memory channel model is established.Taking the decoding principle and algorithm of LDPC code as the research focus,the Log-BP algorithm with the posterior probability as the soft information measurement and the SD algorithm with Euclidean distance as the soft information measurement are analyzed,and these two algorithms are used as the decoding implementation scheme to establish the NAND flash LDPC code correction system model.In order to solve the problem that the base of the antiloglog function in the SD algorithm affects the decoding performance,the Monte Carlo method of the base optimization is studied based on the theory of information entropy,and the applicable base of the SD algorithm under different flash channel characteristics is determined.Aiming at the problem of error during the soft information generation after soft sensing of flash memory,three schemes of threshold voltage approximation are simulated and compared in performance.Considering that the MLC flash memory is stored with multi-bit data,the SD decoding scheme in which LSB decoding information assists MSB decoding in a multi-level flash memory is designed.In this thesis,the LDPC code error correction system model of NAND flash memory is simulated,and the error correction performance of the Log-BP algorithm and the SD decoding scheme in flash memory channel with different P/E cycles and data retention time are given and analyzed.The simulation results show that the LDPC code error correction scheme of NAND flash memory can effectively correct the errors in flash memory and improve the reliability of the flash memory system.The number of P/E cycles that can be executed by using Log-BP algorithm with known CNI is 5,000 times more than that with unknown CNI.By exponentially approximating the threshold voltage after flash memory reading,the decoding performance of the SD algorithm after the base is determined by Monte Carlo optimization is better than that of the Log-BP decoding algorithm,which verifies the feasibility of Monte Carlo optimization of SD algorithm.The SD decoding scheme studied in this thesis does not depend on the channel state information,which can achieve low complexity of soft decision decoding.