| Based on a TSMC 0.18μm CMOS process technology,a 14 bit digital to analog converter(DAC)used for a temperature sensor has been designed.It mainly consists of a current source array,a R-2R resistor network,a thermometer encoding circuit,a synchronous latch switch driver,a switch network,and a Class AB amplifier.The current source array and R-2R resistance network in this article adopt a segmented structure of "4+10".The high 4 bits use a thermometer encoded current rudder structure,the low 10 bits use an R-2R resistance network structure,the current source array uses a threshold voltage compensation current source structure,and the resistance network uses resistance pairs with resistance values of R and 2R.Firstly,convert the high 4-bit binary code output from the ideal 14 bit ADC model to the thermometer code,and the low 10 bit binary code remains unchanged.Secondly,a synchronous latch switch driving circuit is used to drive the PMOS switch in the thermometer encoding circuit and the complementary error switch in the R-2R resistance network.The synchronous latch switch drive circuit drives the MOS switch by synchronizing the thermometer code and binary code signals through a voltage swing limiting circuit.The switch drive circuit makes all switch control signals switch consistently under the control of the clock,prevents simultaneous shutdown,and reduces clock feedthrough and output burrs.In switch networks,the high 4 bits use PMOS transistors to reduce circuit area consumption,while the low 10 bits use complementary switches to reduce the linear resistance of MOS transistors.When introduced into the R-2R resistance network,resistance mismatch occurs,improving signal output accuracy.The current source array is provided with a constant current by a current source circuit,which reduces voltage drop and power consumption while ensuring that the unit current source array remains unchanged.The output stage uses a Class AB amplifier as the buffer stage,which has lower power consumption and higher output swing.This design component is based on TSMC 0.18μm CMOS process package,and use Spectre and AMS joint simulation in Cadence IC617 software to verify the functionality and performance of DAC.At a 3.3V power supply voltage,the differential nonlinearity(DNL)of the designed 14 bit DAC is ± 0.89 LSB,and the integral nonlinearity(INL)is ±0.78 LSB.When the input signal frequency is 200 k Hz and the sampling frequency is 5MHz,the Spurious free dynamic range(SFDR)is 64.92 d B,and the effective number of bits(ENOB)is 12.97 bit,The circuit area is 0.52mm*0.642 mm,and the static power consumption is 1.57 mA. |
