Research And Design Of Dedicated High-speed Dac Circuit

This research topic comes from incorporation between General Staff and Third Dep. at University of Electronic Science and Technology of China. The responsibility of author is circuit research and design, pre-simulation. The research achievements will be handed over Third Dep. for the use of successive researchers.A 10-bit resolution, 100 Msample/S current steering Digital-to-Analog Converter (DAC) is presented. After compared and analyzed the traditional DAC, a segmented current-steering DAC is presented, and its working principles and circuit architecture get a deep study, which based on analysis of binary weighted DAC and thermometer-coded DAC in details. Many factors that influence the performance of DAC are argued and, in the end, the DAC has 8+2 segmented architecture.In the design, a host of theories and design methods must be studied, such as mismatch, symmetrical switch, latch, current source, bias circuit, layout and so on. On the premise of detailed argument, concrete structure and simulation results are presented. DAC mentioned in this paper has sampling frequencies up to 100M and resolution up to 10-bit if architectures and design cells that are presented in this paper are adopted. In addition, chip area consumption and power dissipation have a considerable decrease. The DAC's specifications meet the demand that is brought up.