Multi-function Radar Signal Emulator

Weather radar holds a very important position in modern society.Agriculture,civil aviation,military and other fields all rely on accurate weather forecasts.And many special weather events are rare and occur infrequently.But it is necessary to study these special weather conditions.Therefore,a emulator that can simulate weather radar echo signals is of great significance for research.The weather radar can receive images that can be reproduced on the screen,as long as past weather data is transmitted to the weather radar emulator.A radar emulator can simulate the transmitting and receiving signals of a radar system.In order to study simulated weather radar systems,a research institute has proposed a simple data algorithm that simplifies the structure of echo data.With simple calculations,the echo data record table can be converted into amplitude and phase data of simulated echo signals.The research institute has designed a detector and imaging system for simulating radar systems.This thesis introduces the design and implementation method of a radar echo signal emulator.In order to adapt to the algorithm proposed by the research institute,the radar signal emulator uses FPGA for control and calculation,and DDS chips for analog waveform synthesis.Using RAM working mode,DDS chips can quickly synthesize analog waveforms through amplitude and phase signals and table lookup.This thesis provides a detailed introduction to the design and implementation process of the hardware system.The hardware system is divided into two parts: a motherboard and two daughterboards.The motherboard is embedded with an FPGA core board,while the daughterboards are DDS modules.By adding the same DDS module,the hardware system can directly increase the number of output channels.The designed circuit can drive four DDS modules,but in reality only two channels are needed,so only two DDS modules have been produced.The upper computer communicates with the radar signal emulator through serial and network ports.When the FPGA receives the data,it is first stored in the internal FLASH memory and processed by the data transfer module in the hardware logic and stored in the DDR3memory;After the upper computer sets the output mode and output commands,the data output process function module in the hardware logic extracts the amplitude and phase data from DDR3,packages them into DDS control words,and sends them to the DDS chip.The analog waveform output by the DDS chip is further filtered to obtain a smooth echo signal,which is transmitted to the upper computer.The upper computer displays the images on the screen.Finally,the radar signal emulator is jointly debugged with the upper computer,and the results show that the simulated echo signal fully meets the design requirements,and can correctly image,and generate the radar chart of reflectivity and speed.