Research And Implementation Of Key Technology Of Channel Emulator Based On FPGA

Channel emulator can simulate real radio channel propagation environment in the laboratory, channel emulator has a wide range of applications. In engineering, it can be used in testing wireless communication devices, and in the academic, it can be used in the research of channel modeling. With the continued development of wireless communication technology, channel emulator will have more challenges and further development space, mainly in three aspects.Dealing with the different sampling rates of the channel tap coefficient sequence and the input signal, the channel emulator how to support higher path delay resolution at the demand of higher channel bandwidths,the convolution scheme must have high real - time and low resource occupancy rate.In this paper, based on the principles of software radio, introducing the hardware and software components of channel emulator, with the channel emulator baseband FPGA functions, combining channel model simulation theory with the FPGA development, studying on three key technologies in the baseband, and designing and implementing the related modules. The main work and innovation of this paper are as follows:By efficient and high-precision interpolation algorithm to match the channel tap coefficients of the input signal sampling rate. Wireless channel model tap coefficients are generated by DSP with standard channel model formula. The channel sampling rate of its tap sequence is only related to the maximum Doppler shift. In the channel simulator, the transmitting signal of the transmitting antenna is related to the RF input,the sampling rate is related to the hardware platform of the channel emulator. So the sampling rate is inconsistent in the channel convolution in baseband. The channel tap coefficients need to be interpolated,improve its sampling rate. In this paper, making full use of the different advantages of FPGA and DSP, by designing the data frame format and interpolation algorithm, realizing the channel tap coefficient interpolation.For the channel model, the delay range is large, so the delay module is divided into integer delay and fractional delay respectively. In the channel model simulation, multipath simulation is very important, and multi-path delay has a large span. In the channel emulator, the number of clocks for a given clock frequency is usually not an integer with multi-path delay. For the signal delay, it needs to be divided into integer delay and fractional delay. In this paper, realizing multi-path integer delay,by rewriting read and write address of the dual-port RAM. Optimizing the structure of the Farrow filter achieve high-resolution fractional delay filter.By analyzing the real-time and resource occupancy of time-frequency channel convolution, designing a convolution scheme to meet the requirements of the current channel simulator. For the processing of the channel convolution, it is generally divided into time domain and frequency domain processing. Combining the characteristics of the standard channel model, after studying the methods of time domain and frequency domain processing, design the scheme of the convolution module in channel emulator.This paper focuses on the three functional modules of the channel emulator baseband, and studying the related key technologies. Finally,design related functions.