Multifunctional Radar Signal Processor Based On FPGA

Field-programmable gate array (FPGA) takes an important role in radar signal processing. In addition, the characteristics of SDRAM, such as high-speed, high-capacity and low-power make it convenient to buffer the mass data in the high-speed real-time radar system. In this thesis, multifunctional radar signal processor based on FPGA and DDR2-SDRAM is studied. The main contribution is as follows:Firstly, the structure of the multifunction radar signal processor is decided and the basic theory is introduced briefly. Secondly, the DDR2-SDRAM memory interface module and the main algorithm modules in radar signal processing are designed with widely-used commercial IP cores. In the procedure, pulse compression is processed in frequency domain. Moving target detection and Constant False Alarm Rate is realized by FFT and two-dimensional structure, respectively. Finally, the optimization is implemented combined with the hardware and software features of Xilinx, and the system performance is estimated. The result validates the effectiveness of the proposed system with the characteristics of higher communication speed, high-speed operation capacity, mass storage and lower power dissipation.