| The test system of Radar is essential to assess the quality and performance of Radar products. Meanwhile, it could provide information quantitatively and qualitatively involved in the maintaining, malfunction detecting and diagnosing of Radar system. The signal source in Radar test system simulates the reflected wave of detected objects in variety environments accurately which will be injected to the Radar system to measure the performance or state of the individual modules and as a whole of the Radar system. the signal source is the key part of the test system.This thesis elaborates the developing process of a frequency synthesizer as a signal source of Radar test system based on FPGA controlling DDS in Ku band. The hardware is implemented in 6 layers of PCB. At the same time, to achieve acceptable power and signal integrity, the power supply and decoupling circuits, the FPGA configuration circuit and the control interface to the DDS and to next stage are carefully designed.Verilog is used as the programming language to code the control system modules of the testing frequency synthesizer. The serial port’s realization is made use of the Microblaze Softcore of the Xilinx FPGA. Tandem flip-flops and FIFO are involved to crack the nuts of cross-time-domain data transmission issues. The timing and control part of the system are fulfilled modularly. Configuration data and control logic are isolated in this design. Every independent function control logic block such as timing block, SPI block etc. is connected as system by control bus to the control center block.At last, the test results are given. The performance of the system is measured in time domain, frequency domain and modulation domain and the conclusion can be draw that the performance meets the anticipation. Besides,problems emerged in the testing processing and their resolutions are listed in this thesis. Further, some ideas that may improve the performance of the signal source are given. |
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