The Research Of In-memory Computing And Write Circuit For MRAM

With the development of storage technology,semiconductor memories based on traditional processes(such as DRAM,SRAM,and NAND flash memory,etc.)have encountered bottlenecks in performance development.At the same time,the rise and development of data-intensive applications such as artificial intelligence technology and cloud computing technology have put forward higher requirements for memory performance.Spin transfer torque-magnetic random access memory(STT-MRAM),as a new type of non-volatile memory,is expected to replace SRAM and DRAM becoming one of the next generation general storage technologies becauses of its advantages of high-speed reading and writing,high density,low power consumption,and almost unlimited writing times.In addition,the in-memory computing technology based on STT-MRAM effectively solves the "memory wall" problem in the traditional computer architecture system.This article focuses on the MRAM in-memory computing scheme and the optimization of the power consumption of write operations.The specific work content is as follows:(1)First studied the working mechanism of MRAM,and then analyzed the resistance characteristics,critical current characteristics and flip characteristics based on the Verilog-A model of MTJ.At the same time,the model parameters were set according to the subsequent circuit design requirements of this article,and the model was simulated and verified basing on SMIC 55 nm LL logic process.(2)In order to solve the "storage wall" problem faced by the traditional VonNeumann computer architecture,this paper proposes a new type of 2T1 MTJ in-memory computing scheme based on STT-MRAM—controlling the front-end2T1 MTJ in-memory computing.Compared with the existing 1T1 MTJ and 2T2 MTJ in-memory computing solutions,this solution can realize bitwise AND/OR logic operations only by using the same set of reference units.And as the arithmetic units using different types of transistors,the accuracy of calculation operation and the reliability of writing operation are improved.At a write voltage of 600 m V,the correct rate of the write operation can reach 92.9%.(3)The write operation of MRAM was studied.The challenges faced by the write operation and the factors affecting the write power consumption were analyzed,and the low-power write circuit corresponding in-memory calculation scheme of STT-MRAM and SOT-MRAM were designed respectively.In the new 2T1 MTJ in-memory calculation solution based on STT-MRAM,no write operation is performed when the data to be written is the same as the data currently stored in the target cell.Compared with the traditional write drive circuit,the average write power consumption is reduced by 76.2 %.An improved 2T1 MTJ cell structure is proposed for SOT-MRAM,which effectively solves the problem of current asymmetry when reading and writing to a memory cell at the same time;design a low-power self-terminating write circuit that is compatible with the cell structure.Avoiding repeated data writing and terminating the writing operation after the data is correctly written.Compared with the traditional writing drive circuit,the average writing power consumption is effectively reduced by77.35%,which is slightly better than the solution using dynamic early self-terminating technology.